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Digital Electronics: A Practical Approach by William Kleitz (Mixed media product, 2007)
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Product description
| Key Features | |
| Author(s) | William Kleitz |
| Publisher | Pearson Education (US) |
| Date of Publication | 12/03/2007 |
| Language | English |
| Format | Mixed media product |
| ISBN-10 | 0132435780 |
| ISBN-13 | 9780132435789 |
| Subject | Engineering & Technology: Textbooks & Study Guides |
| Publication Data | |
| Place of Publication | Upper Saddle River |
| Country of Publication | United States |
| Imprint | Prentice Hall |
| Out-of-print date | 26/08/2011 |
| Content Note | col. Illustrations |
| Dimensions | |
| Weight | 2142 g |
| Width | 215 mm |
| Height | 281 mm |
| Spine | 39 mm |
| Editorial Details | |
| Contained items statement | Contains Hardback and CD-ROM |
| Edition Statement | 8th Revised edition |
| Description | |
| Table Of Contents | (NOTE:Each chapter begins with an Outline, Objectives, and an Introduction, and concludes with a Summary, Glossary, Problems, Schematic Interpretation Problems, Electronics Workbench Exercises, and Answers to Review Questions. ) 1. Number Systems and Codes. Digital Versus Analog. Digital Representations of Analog Quantities. Decimal Numbering System (Base 10). Binary Numbering System (Base 2). Decimal-to-Binary Conversion. Octal Numbering System (Base 8). Octal Conversions. Hexadecimal Numbering System (Base 16). Hexadecimal Conversions. Binary-Coded-Decimal System. Comparison of Numbering Systems. The ASCII Code. Applications of the Numbering Systems. 2. Digital Electronic Signals and Switches. Digital Signals. Clock Waveform Timing. Serial Representation. Parallel Representation. Switches in Electronic Circuits. A Relay as a Switch. A Diode as a Switch. A Transistor as a Switch. The TTL Integrated Circuit. MultiSIM Simulation of Switching Circuits. The CMOS Integrated Circuit. Surface-Mount Devices. 3. Basic Logic Gates. The AND Gate. The OR Gate. Timing Analysis. Enable and Disable Functions. Using IC Logic Gates. Introduction to Troubleshooting Techniques. The Inverter. The NAND Gate. The NOR Gate. Logic Gate Waveform Generation. Using IC Logic Gates. Summary of the Basic Logic Gates and IEEE/IEC Standard Logic Symbols. 4. Programmable Logic Devices: Altera and Xilinx CPLDs and FPGAs. PLD Design Flow. PLD Architecture. Using PLDs to Solve Basic Logic Designs. CPLD Problems. 5. Boolean Algebra and Reduction Techniques. Combinational Logic. Boolean Algebra Laws and Rules. Simplification of Combinational Logic Circuits Using Boolean Algebra. De Morgan's Theorem. The Universal Capability of NAND and NOR Gates. AND-OR-INVERT Gates for Implementing Sum-of-Products Expressions. Karnaugh Mapping. System Design Applications. CPLD Design Applications. CPLD Problems. 6. Exclusive-OR and Exclusive-NOR Gates. The Exclusive-OR Gate. The Exclusive-NOR Gate. Parity Generator/Checker. System Design Applications. CPLD Design Applications. CPLD Problems. 7. Arithmetic Operations and Circuits. Binary Arithmetic. Two's-Complement Representation. Two's-Complement Arithmetic. Hexadecimal Arithmetic. BCD Arithmetic. Arithmetic Circuits. Four-Bit Full-Adder ICs. System Design Applications. Arithmetic/Logic Units. CPLD Design Applications. CPLD Problems. 8. Code Converters, Multiplexers, and Demultiplexers. Comparators. Decoding. Encoding. Code Converters. Multiplexers. Demultiplexers. System Design Applications. CPLD Design Applications. CPLD Problems. 9. Logic Families and Their Characteristics. The TTL Family. TTL Voltage and Current Ratings. Other TTL Considerations. Improved TTL Series. The CMOS Family. Emitter-Coupled Logic. Comparing Logic Families. Interfacing Logic Families. 10. Flip-Flops and Registers. S-R Flip-Flop. Gated S-R Flip-Flop. Gated D Flip-Flop. Integrated-Circuit D Latch (7475). Integrated-Circuit D Flip-Flop (7474). Master-Slave J-K Flip-Flop. Edge-Triggered J-K Flip-Flop. Integrated-Circuit J-K Flip-Flop (7476, 74LS76). Using an Octal D Flip-Flop in a Microcontroller Application. CPLD Problems. 11. Practical Considerations for Digital Design. Flip-Flop Time Parameters. Automatic Reset. Schmitt Trigger ICs. Switch Debouncing. Sizing Pull-Up Resistors. Practical Input and Output Considerations. 12. Counter Circuits and VHDL State Machines. Analysis of Sequential Circuits. Ripple Counters. Design of Divide-by-N Counters. Ripple Counter ICs. System Design Applications. Seven-Segment LED Display Decoders. Synchronous Counters. Synchronous Up/Down-Counter ICs. Applications of Synchronous Counter ICs. CPLD Design Applications. CPLD Problems. Implementing State Machines in VHDL. 13. Shift Registers. Shift Register Basics. Parallel-to-Serial Conversion. Recirc |
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