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ASIC and FPGA Verification: A Guide to Component Modeling by Richard Munden (Paperback, 2004)

About this product

About this product

Product Information

Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today's digital designs. ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system. It is a valuable resource for any designer who simulates multi-chip digital designs. *Provides numerous models and a clearly defined methodology for performing board-level simulation. *Covers the details of modeling for verification of both logic and timing. *First book to collect and teach techniques for using VHDL to model off-the-shelf or IP digital components for use in FPGA and board-level design verification.

Product Identifiers

Publisher
Elsevier Science & Technology
ISBN-13
9780125105811
eBay Product ID (ePID)
95149674

Product Key Features

Subject Area
Material Science
Author
Richard Munden
Publication Name
ASIC and FPGA Verification: a Guide to Component Modeling
Format
Paperback
Language
English
Publication Year
2004
Type
Textbook
Number of Pages
336 Pages

Dimensions

Item Height
235mm
Item Width
191mm
Item Weight
860g

Additional Product Features

Title_Author
Richard Munden
Series Title
Systems on Silicon
Country/Region of Manufacture
United States

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