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About this product
- DescriptionThis book describes invative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-techlogy solutions that are needed to make 3D ICs a reality and commercially viable.
- Author BiographyKrishnendu Chakrabarty is a Professor of Electrical and Computer Engineering at Duke University. He received his PhD from University of Michigan. He is a Fellow of IEEE and a Distinguished Engineer of ACM.
- Author(s)Brandon Noia,Krishnendu Chakrabarty
- PublisherSpringer International Publishing AG
- Date of Publication16/11/2013
- SubjectElectronics Engineering & Communications Engineering
- Place of PublicationCham
- Country of PublicationSwitzerland
- ImprintSpringer International Publishing AG
- Content Note18 black & white illustrations, 115 colour illustrations, 23 black & white tables, biography
- Weight577 g
- Width155 mm
- Height235 mm
- Spine16 mm
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