Save on Textbooks
- AU $56.99Trending at AU $70.84
- AU $13.75Trending at AU $17.70
- AU $17.60Trending at AU $22.14
- AU $69.53Trending at AU $87.71
- AU $23.06Trending at AU $32.72
- AU $34.66Trending at AU $35.87
- AU $28.96Trending at AU $38.89
About this product
- DescriptionMicroelectronic packaging architecture evolutions are being driven by silicon techlogy advancements and new form factors, used models and emerging techlogies. High-performance mobile computer and communication systems will require higher I/O counts, greater density, lower cost, lighter weight and improved performance in the electronic package. The book focuses on silicon techlogy dimension scaling and performance improvement, Pb-free or 'green' assembly, and system-in-package (SIP) techlogies. It explores the key thermomechanical failure modes and mitigating solutions associated with integration of silicon with weak interlayer dielectrics during the assembly process, under bump metallurgy integrity with lead-free assembly, and the impact of stress on die-cracking and transistor performance in 3D thin-die stacking. The interaction of these failures with silicon and assembly materials, processes and design features is covered and includes: system in package; advanced packaging/natechlogy in packaging; physical behavior and mechanical behavior in packaging; electromigration and thermal behavior in packaging and thin films and adhesives in packaging.
- PublisherMaterials Research Society
- Date of Publication09/04/2007
- SubjectEngineering & Technology: Textbooks & Study Guides
- Series TitleMRS Proceedings
- Country of PublicationUnited States
- ImprintMaterials Research Society
- Weight409 g
- Width152 mm
- Height228 mm
- Edited byChing-Pong Wong,Darrel Frear,Sujit Sharan,Vasudeva Prasad Atluri
This item doesn't belong on this page.
Thanks, we'll look into this.