This book presents the latest techniques for characterization, modeling and design for na-scale n-volatile memory (NVM) devices. Coverage focuses on fundamental NVM device fabrication and characterization, internal state identification of memristic dynamics with physics modeling, NVM circuit design and hybrid NVM memory system design-space optimization. The authors discuss design methodologies for na-scale NVM devices from a circuits/systems perspective, including the general foundations for the fundamental memristic dynamics in NVM devices. Coverage includes physical modeling, as well as the development of a platform to explore vel hybrid CMOS and NVM circuit and system design. * Offers readers a systematic and comprehensive treatment of emerging na-scale n-volatile memory (NVM) devices; * Focuses on the internal state of NVM memristic dynamics, vel NVM readout and memory cell circuit design and hybrid NVM memory system optimization; * Provides both theoretical analysis and practical examples to illustrate design methodologies; * Illustrates design and analysis for recent developments in spin-toque-transfer, domain-wall racetrack and memristors.