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About this product
- DescriptionNew manufacturing techlogies have made possible the integration of entire systems on a single chip. This new design paradigm, termed system-on-chip (SOC), together with its associated manufacturing problems, represents a real challenge for designers. SOC is also reshaping approaches to test and validation activities. These are beginning to migrate from the traditional register-transfer or gate levels of abstraction to the system level. Until w, test and validation have t been supported by system-level design tools so designers have lacked the infrastructure to exploit all the benefits stemming from the adoption of the system level of abstraction. Research efforts are already addressing this issue. This mograph provides a state-of-the-art overview of the current validation and test techniques by covering all aspects of the subject including: * modeling of bugs and defects; * stimulus generation for validation and test purposes (including timing errors; * design for testability.
- Author BiographyMatteo Sonza Reorda is the leader of the computer-aided design group of the Dipartimento di Automatica e Informatica, Politecnico di Torino. Zebo Peng is Professor of the chair in Computer Systems and Director of the Embedded Systems Laboratory at Linkoping University.
- PublisherSpringer London Ltd
- Date of Publication10/11/2010
- SubjectElectronics Engineering & Communications Engineering
- Series TitleSpringer Series in Advanced Microelectronics
- Series Part/Volume Number17
- Place of PublicationEngland
- Country of PublicationUnited Kingdom
- ImprintSpringer London Ltd
- Content Notebiography
- Weight302 g
- Width156 mm
- Height234 mm
- Spine10 mm
- Edited byMassimo Violante,Matteo Sonza Reorda,Zebo Peng
- Format DetailsTrade paperback (US)
- Edition StatementSoftcover reprint of hardcover 1st ed. 2005
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