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Rapid Prototyping of Digital Systems : Quartus® by James O. Hamblen, Tyson S....

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Item specifics

Condition
Brand new: A new, unread, unused book in perfect condition with no missing or damaged pages. See the ...
ISBN
9780387277288

About this product

Product Identifiers

Publisher
Springer
ISBN-10
0387277285
ISBN-13
9780387277288
eBay Product ID (ePID)
48250478

Product Key Features

Number of Pages
Xvi, 371 Pages
Publication Name
Rapid Prototyping of Digital Systems : Quartus®
Language
English
Publication Year
2005
Subject
Industrial Design / General, Cad-Cam, Electronics / Circuits / General, Software Development & Engineering / Systems Analysis & Design, Logic Design
Type
Textbook
Subject Area
Computers, Technology & Engineering
Author
James O. Hamblen, Tyson S. Hall, Michael D. Furman
Format
Trade Paperback

Dimensions

Item Weight
52.2 Oz
Item Length
10 in
Item Width
7 in

Additional Product Features

Edition Number
3
Intended Audience
Scholarly & Professional
LCCN
2005-051723
Dewey Edition
22
Number of Volumes
1 vol.
Illustrated
Yes
Dewey Decimal
621.395
Table Of Content
Tutorial I: The 15-Minute Design.- The Altera UP 3 Board.- Programmable Logic Technology.- Tutorial II: Sequential Design and Hierarchy.- UP3core Library Functions.- Using VHDL for Synthesis of Digital Hardware.- Using Verilog for Synthesis of Digital Hardware.- State Machine Design: The Electric Train Controller.- A Simple Computer Design: The µP 3.- VGA Video Display Generation.- Interfacing to the PS/2 Keyboard and Mouse.- Legacy Digital I/O Interfacing Standards.- UP 3 Robotics Projects.- A RISC Design: Synthesis of the MIPS Processor Core.- Introducing System-on-a-Programmable-Chip.- Tutorial III: Nios II Processor Software Development.- Tutorial IV: Nios II Processor Hardware Design.
Synopsis
Rapid Prototyping of Digital Systems: Quartus II Edition provides an exciting and challenging laboratory component for undergraduate digital logic and computer design courses using FPGAs and CAD tools for simulation and hardware implementation. The more advanced topics and exercises also make this text useful for upper level courses in digital logic, programmable logic, and embedded systems. This new version of the widely used Rapid Prototyping of Digital Systems, Second Edition, now uses Altera's new Quartus II CAD tool and includes laboratory projects for Altera's UP 2 and the new UP 3 FPGA board. Rapid Prototyping of Digital Systems: Quartus II Edition includes four tutorials on the Altera Quartus II and NIOS II tool environment, an overview of programmable logic, and IP cores with several easy-to-use input and output functions. These features were developed to help students get started quickly. Early design examples use schematic capture and IP cores developed for the Altera UP FPGA boards. VHDL is used for more complex designs after a short introduction to VHDL-based synthesis. New to this edition is an overview of System-on-a-Programmable Chip (SOPC) technology and SOPC design examples for the UP3 using Altera's new NIOS II Processor hardware and C software development tools., Rapid Prototyping of Digital Systems: Quartus II Edition provides an exciting and challenging laboratory component for undergraduate digital logic and computer design courses using FPGAs and CAD tools for simulation and hardware implementation. The more advanced topics and exercises also make this text useful for upper level courses in digital logic, programmable logic, and embedded systems. This new version of the widely used Rapid Prototyping of Digital Systems, Second Edition, now uses Altera's new Quartus II CAD tool and includes laboratory projects for Altera's UP 2 and the new UP 3 FPGA board. Student laboratory projects provided on the book's CD-ROM include video graphics and text, mouse and keyboard input, and three computer designs. Rapid Prototyping of Digital Systems: Quartus II Edition includes four tutorials on the Altera Quartus II and NIOS II tool environment, an overview of programmable logic, and IP cores with several easy-to-use input and output functions. These features were developed to help students get started quickly. Early design examples use schematic capture and IP cores developed for the Altera UP FPGA boards. VHDL is used for more complex designs after a short introduction to VHDL-based synthesis. New to this edition is an overview of System-on-a-Programmable Chip (SOPC) technology and SOPC design examples for the UP3 using Altera's new NIOS II Processor hardware and C software development tools. A full set of Altera's FPGA CAD tools is included on the book's CD-ROM.
LC Classification Number
TK7867-7867.5

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