This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.
Product Identifiers
Publisher
Springer International Publishing Ag
ISBN-13
9783319023779
eBay Product ID (ePID)
190421835
Product Key Features
Subject Area
Material Science
Author
Brandon Noia, Krishnendu Chakrabarty
Publication Name
Design-For-Test and Test Optimization Techniques for Tsv-Based 3d Stacked Ics
Format
Hardcover
Language
English
Subject
Computer Science, Physics
Publication Year
2013
Type
Textbook
Number of Pages
245 Pages
Dimensions
Item Height
235mm
Item Width
155mm
Item Weight
5685g
Additional Product Features
Title_Author
Krishnendu Chakrabarty, Brandon Noia
Country/Region of Manufacture
Switzerland
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